The invention relates to thin film transistors (TFTs), and a novel method to minimize variability of threshold voltages across a TFT array.
In TFT memory devices, programmed and erased memory cells are distinguished by their different threshold voltages. Each cell has a higher threshold voltage when programmed than when erased. When there is too much variation of threshold voltage across an array, however, it may become difficult to distinguish erased cells from programmed cells. There is a need, therefore, to decrease variability of threshold voltages across a TFT array.